High-energy neutrons lose energy in materials mainly through collisions with silicon nuclei that lead to a chain of secondary reactions. These reactions deposit a dense track of electron-hole pairs as they pass through a p-n junction. Some of the deposited charge will recombine, and some will be collected at the junction contacts. When a particle strikes a sensitive region of an SRAM (Static Random Access Memory) cell, the charge that accumulates could exceed the minimum charge that is needed to “flip” the value stored in the cell, resulting in a soft error.
The smallest charge that results in a soft error is called the critical charge of the SRAM cell. The rate at which soft errors occur (SER) is typically expressed in terms of failures in time (FIT).
A common source of soft errors are alpha particles, which may be emitted by trace amounts of radioactive isotopes present in packing materials of integrated circuits. “Bump” material used in flip-chip packaging techniques has also been identified as a possible source of alpha particles.
Other sources of soft errors include high-energy cosmic rays and solar particles. High-energy cosmic rays and solar particles react with the upper atmosphere generating high-energy protons and neutrons that shower to the earth. Neutrons can be particularly troublesome as they can penetrate most man-made construction (a neutron can easily pass through five feet of concrete). This effect varies with both latitude and altitude. In London, the effect is two times worse than on the equator. In Denver, Colo. with its mile-high altitude, the effect is three times worse than a sea-level San Francisco. In a commercial airplane, the effect can be 100-800 times worse than at sea-level.
Unlike capacitor-based DRAMs (Dynamic Random Access Memory), SRAMs are constructed of cross-coupled devices, which typically have less capacitance in each cell. As SRAM cells become smaller, the capacitance in each cell typically becomes smaller. As result, the critical charge required to “flip” a SRAM cell is reduced and soft error rates may increase.
In addition, the type of capacitance in a SRAM cell may increase the SER. The capacitance in a SRAM cell, among other types, includes capacitance created by p/n junctions and capacitance created by oxides. Since electron/holes pairs are created as high-energy neutrons pass through a p/n junction, a deduction in the area of p/n junctions in a SRAM cell typically decreases the SER. Significant numbers of electron/hole pairs are not created when high-energy neutrons pass through oxides. As a result, the SER may typically be reduced by increasing the ratio of oxide capacitance to p/n junction capacitance in a SRAM cell.
There is a need in the art to reduce the SER in SRAM cells. An embodiment of this invention reduces the SER in a dual-port read SRAM cell. In addition, an embodiment of this invention deceases the read times as well as reduces the physical size of a dual-port read SRAM cell.